Packet Digital, LLC

Packet Digital has a team of skilled ASIC design engineers and industry leading EDA tools. The team has successfully completed many custom ASIC projects, including analog, digital, and mixed signal designs. These designs have been taken from requirements capture to customer delivered silicon with tight timelines. Packet Digital's design methodology includes extensive testbench development and simulation verification to ensure confidence in the initial silicon.

Packet Digital power management IC layout

Analog circuit design

  • Schematic capture, simulation, layout, physical verification
  • Silicon proven circuits:
    • Voltage regulators (switching and linear)
    • Analog to Digital Converters
    • Digital to Analog Converters
    • Amplifiers
    • Voltage references
    • Current references
    • Oscillators
    • Comparators
    • Timers
  • Circuit verification with spice, fast-spice, corner, and Monte Carlo simulation
Mixed signal simulation

Digital logic design

  • RTL coding
  • Testbench generation
  • Synthesis
  • Place and route
  • Timing, area, power analysis

Mixed-signal design

  • High performance digital combined with precision analog
  • Wide range of IP libraries available to build your SoC or ASIC product
Verification testing


  • Mixed signal and real number modeling
  • System level verification:
    • Spice
    • SystemVerilog
    • Verilog-AMS
    • VHDL-AMS
  • Metric driven verification methodology:
    • Executable verification plans
    • Code coverage
    • Assertions
    • Constrained random testing
Packet Digital PMIC

Fabrication and Assembly

  • Low cost prototype wafer runs
  • Many small volume packaging options
  • Debug and failure analysis
  • High volume dedicated wafer runs with top foundries
  • Access to world-class production packaging and test facilities

Contact Us about your custom ASIC project!